Synopsys has released new software tools to address the growing complexity of designing AI chips, following its $35 billion acquisition of Ansys. This move responds to the industry shift from single chips to complex assemblies of smaller "chiplets," which introduce mechanical engineering challenges like heat management and physical stress.
The new tools integrate Ansys's engineering simulation capabilities directly into the chip design software used by companies like AMD, Nvidia, and Intel. The goal is to allow designers to address potential physical failures early in the design phase, moving away from a siloed approach.
CEO Sassine Ghazi states this integrated method aims to produce chips with better performance, lower power consumption, and reduced cost by optimizing the design from the start.
Main topics: Synopsys's new AI chip design tools, the acquisition of Ansys, the industry shift to chiplet-based designs, and the integration of mechanical engineering simulations into the design process.
Synopsys on Wednesday rolled out new software tools to handle the fast-increasing complexity of designing artificial intelligence chips, the first wave of new offerings after its $35 billion buyout of engineering software firm Ansys.
Synopsys, which announced the new tools at a conference in âSilicon Valley, has â for â decades been one of the main suppliers of software used in determining how to arrange the tens of billions of transistors that make up chips from firms such as Advanced Micro Devices and Nvidia, which last year invested in $2 billion Synopsys. But flagship offerings from AMD and Nvidia are no longer a â single chip âat all, but instead many smaller "chiplets" stacked and packaged together in increasingly complicated ways.
That trend drove the â Ansys deal because chip designers now must grapple âwith problems that used to be the realm âof mechanical engineers, such as whether the heat generated by chiplet could cause it warp or expand in ways that could make it crack and separate from its neighbor, destroying a complex chip that can cost tens of thousands of dollars.
Sassine âGhazi, the CEO of Synopsys, said the new tools aim to embed those engineering tools into the âsoftware tools âthat chip designers â such as Intel and others are already using.
"Typically you have engineers designing for each step in a siloed way," Ghazi said. "What ends âup happening is that the product is more expensive and it's not operating at its maximum potential. We're putting them in the design phase, so you're able to achieve a better performance, lower power and definitely lower cost."
Synopsys, which announced the new tools at a conference in âSilicon Valley, has â for â decades been one of the main suppliers of software used in determining how to arrange the tens of billions of transistors that make up chips from firms such as Advanced Micro Devices and Nvidia, which last year invested in $2 billion Synopsys. But flagship offerings from AMD and Nvidia are no longer a â single chip âat all, but instead many smaller "chiplets" stacked and packaged together in increasingly complicated ways.
That trend drove the â Ansys deal because chip designers now must grapple âwith problems that used to be the realm âof mechanical engineers, such as whether the heat generated by chiplet could cause it warp or expand in ways that could make it crack and separate from its neighbor, destroying a complex chip that can cost tens of thousands of dollars.
Sassine âGhazi, the CEO of Synopsys, said the new tools aim to embed those engineering tools into the âsoftware tools âthat chip designers â such as Intel and others are already using.
"Typically you have engineers designing for each step in a siloed way," Ghazi said. "What ends âup happening is that the product is more expensive and it's not operating at its maximum potential. We're putting them in the design phase, so you're able to achieve a better performance, lower power and definitely lower cost."
Meridiano
